FLOC 2018: FEDERATED LOGIC CONFERENCE 2018
PROGRAM
AUTHORS
KEYWORDS
VOLUMES
FLoC
|
FoPSS
|
ITP
|
CSF
|
FSCD
|
SAT
|
CAV
|
IJCAR
|
ICLP
|
FM
|
LICS
|
ADHS
|
ADSL
|
ARQNL
|
ASPOCP
|
AVOCS
|
CL&C
|
COALG
|
Coq
|
DCM
|
Domains13
|
DS-FM
|
EICNCL
|
F-IDE
|
FCS
|
FRIDA
|
GraMSec
|
GS
|
HCVS
|
HDRA
|
HOR
|
HoTT/UF
|
ICLP-DC
|
IFIP WG 1.6
|
Isabelle
|
ITRS
|
IWC
|
LaSh
|
LCC
|
LearnAut
|
LFMTP
|
Linearity/TLLA
|
LMW
|
LOLA
|
LPOP
|
LSB
|
MLP
|
MoRe
|
MSFP
|
NLCS
|
NSV
|
Overture
|
PAAR
|
PARIS
|
PC
|
PLR
|
POS
|
PRUV
|
QBF
|
RCRA
|
REFINE
|
ReMOTE
|
rv4rise
|
SCSC
|
SMT
|
SoMLMFM
|
SR
|
SYNT
|
TERMGRAPH
|
Tetrapod
|
ThEdu
|
TLA
|
TYDI
|
UITP
|
UNIF
|
Vampire
|
VaVAS
|
VDMW
|
VEMDP
|
VSTTE
|
WiL
|
WPTE
|
WST
PROGRAM
|
AUTHORS
|
KEYWORDS
TALK AUTHOR INDEX
Shortcuts:
A
B
D
F
K
L
T
A
Abbas
, Houssam
Using the F1/10 Autonomous Racing Platform for Runtime Verification Research
B
Belta
, Calin
Signal classification using temporal logic
D
Dreossi
, Tommaso
Systematic analysis and improvement of CNNs.
F
Ferrère
, Thomas
First order temporal properties of continuous signals
K
Kapinski
, Jim
Formalizing Requirements for Cyber-Physical Systems: Real-World Experiences and Challenges
L
Leucker
, Martin
Hardware-based runtime verification with Tessla
T
Torfah
, Hazem
Real-time Stream Processing with RTLola
Disclaimer
|
Powered by EasyChair Smart Program