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FLOC 2018: FEDERATED LOGIC CONFERENCE 2018
| Joost-Pieter Katoen Pages in this Program | All Proceedings Papers | | CAV All Papers | | CAV All Papers: Papers with Abstracts | | CAV on Monday, July 16th | | CAV on Sunday, July 15th | | CAV Program | | FM FMComplete | | FM FMComplete: Papers with Abstracts | | FM on Monday, July 16th | | FM on Tuesday, July 17th | | FM Program | | MoRe on Friday, July 13th | | MoRe Papers | | MoRe Papers: Papers with Abstracts | | MoRe Program | | Paper: Formal Verification of Automotive Simulink Controller Models: Empirical Technical Challenges, Evaluation and Recommendations | | Paper: Let this Graph be your Witness! An Attestor for Verifying Java Pointer Programs | | Paper: Monitoring CTMCs By Multi-Clock Timed Automata | | Paper: Multiple Objectives and Cost Bounds in MDP | | Paper: Sound Value Iteration | | Paper: Verifying Auto-Generated C Code from Simulink | | Program | | Program for Friday, July 13th | | Program for Monday, July 16th | | Program for Sunday, July 15th | | Program for Tuesday, July 17th |
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