FLOC 2018: FEDERATED LOGIC CONFERENCE 2018
Verifying nonlinear analog and mixed-signal circuits with inputs

Authors: Chuchu Fan, Yu Meng, Jürgen Maier, Ezio Bartocci, Sayan Mitra and Ulrich Schmid

Paper Information

Title:Verifying nonlinear analog and mixed-signal circuits with inputs
Authors:Chuchu Fan, Yu Meng, Jürgen Maier, Ezio Bartocci, Sayan Mitra and Ulrich Schmid
Proceedings:ADHS Full papers
Editor: Alessandro Abate
Keywords:aaa, bbb, ccc
Abstract:

ABSTRACT. We present a new technique for verifying nonlinear and hybrid models with inputs. We observe that once an input signal is fixed, the sensitivity analysis of the model can be computed much more precisely. Based on this result, we propose a new simulation-driven verification algorithm and apply it to a suite of nonlinear and hybrid models of CMOS digital circuits under different input signals. The models are low-dimensional but with highly nonlinear ODEs, with nearly hundreds of logarithmic and exponential terms. Some of our experiments analyze the metastability of bistable circuits with very sensitive ODEs and rigorously establish the connection between metastability recovery time and sensitivity.

Pages:6
Talk:Jul 12 17:00 (Session 79A: Applications 2)
Paper: