FLOC 2018: FEDERATED LOGIC CONFERENCE 2018
Formal Specification and Verification of Dynamic Parametrized Architectures

Authors: Alessandro Cimatti, Ivan Stojic and Stefano Tonetta

Paper Information

Title:Formal Specification and Verification of Dynamic Parametrized Architectures
Authors:Alessandro Cimatti, Ivan Stojic and Stefano Tonetta
Proceedings:FM FMComplete
Editors: Jan Peleska, Klaus Havelund and Bill Roscoe
Keywords:system architectures, SMT-based model checking, parametrized systems, information flow, formal specification, formal verification, first-order logic
Abstract:

ABSTRACT. We propose a novel approach to the formal specification and verification of dynamic architectures that are at the core of adaptive systems such as critical-infrastructure protection. Key features include run-time reconfiguration based on adding and removing components and connections, resulting in systems with unbounded number of components. We provide a logic-based specification of a Dynamic Parametrized Architecture (DPA), where parameters represent the infinite-state space of possible configurations, and first-order formulas represent the sets of initial configurations and reconfiguration transitions. We encode information flow properties as reachability problems of such DPAs, define a translation into an array-based transition system, and use an SMT-based model checker to tackle a number of case studies.

Pages:18
Talk:Jul 17 17:30 (Session 122B)
Paper: